Reconfigurable CMOS-LDO for with High PSRR at Low Quiescent Current

Abstract

An integrated low-dropout (LDO) voltage regulator with low-noise, high power supply rejection ratio (PSRR), is proposed at 22 nm CMOS technology. The proposed  regulator is able to produce an output voltage regulation at 1.8 Volt process, at low dropout voltage of 25 miliVolt on supply of the input voltage at 450mV. The features of LDO regulator  are observed at high PSRR under the frequency bandwidth lies in 100 kHz and 1 MegaHertz. The LDO design also gives performance in terms of output noise performance below 350 nanoVrms/√Hertz at 100Hertz.